The invention relates to a data processing system with synchronous operation of a computer nucleus, arithmetic logic units, storages, and registers with peripherals.
Known data processing systems generally consist of an arithmetic logic unit, an instruction unit, an internal storage, and peripherals for the reading in and out of data and programs. In such systems, the central processing units are either directly coupled to the input and output devices and synchronized therewith, or connected via buffers and adaptors or interfaces. The adaptors or interfaces and the registers associated to the input and output devices have been included in order to free the central processing unit of the data processing system from time-consuming specific sub-microoperations for the connected input and output devices.
Furthermore, it is known to connect the input and output devices via channels controlling and performing the entire data communication between the central processing unit and the input and output devices. These principles are described in an article in Communications of the ACM, Vol 11, Number 6, June 1968, pp. 410 to 414. In this article it is also pointed out that by the addition of subroutines for the input and output devices, by adding supplementary registers and logic circuits, a channel of a data transmission system actually represents per se a processor which can control specific input and output devices. In modern data processing systems as e.g., in IBM 370/125 the various input and output devices have associated so-called input/output processors. These input/output processors are connected via a bus system, with respect to data as well as instructions, to further subprocessors for predetermined tasks within the data processing system. These processors are made in a large-scale integrated technology so that on the one hand efforts are made to obtain processors with layouts that are so identical as possible, and on the other to design the processors in such a manner that they will satisfy demands for each function to be employed within the data processing system. In order to be able to use multiple I/O control processors within a data processing system of that type of organization, a certain redundancy had to be accepted such that the technical complexity of an I/O control processor for some tasks within the data processing system was too great for price reasons.
In German Auslegeschrift 1.524.099, for a console processor co-acting with a display device, it is suggested in order to reduce the technical complexity to use the deflection registers of the display device during computer operation as accumulator and program address register.
Although it is shown here that external registers associated to the input and output devices can be included in the data flow of a processor in order to reduce the technical complexity, this solution has the disadvantage that this use of the registers for a predetermined purpose cannot be controlled by the microprogram code and is very limited.
It is therefore the object of the present invention to provide an improvement over the above described prior art in that the use of the input/output registers is determined by the micro-program code and by the time control, so that on the one hand all adaptor and interface communication and control functions for the input and output devices are performed by the registers, and that on the other these registers can be fully integrated into the data flow of a processor.